Hi,
I proposed the following circuit to our customer for thermistor input.
Requirment: cost, simple circuit, about 16bit p-p resolutions.
On the other hand, in Maxim's application note,
The same voltage excitation, but the connection is different.
(Question)
Are there advantages and disadvantages in each method?
I think MAXIM's method has a wider dynamic range and ADI's method is high precision.
Please advise me to make the best suggestions for customers.
Best regards,
Hiroshi
Hi everyone,
I'm trying to use the EVAL-ADM2587EEBZ board, for using in RS-485 Half Duplex, RS-485 in Full Duplex and RS-422. But I only have problems with the RS-485 Half Duplex.
As I said I'm using the evaluation board EVAL-ADM2587EEBZ, but I've added some extra circuits to use the TX signal with an inverter transistor to enable and disable nRE and DE signals. This is the scheme:
This is my configuration:
SW1.1: OFF, SW1.2: ON, SW1.3: OFF and SW1.4: ON
SW2.1: OFF, SW2.2: OFF, SW1.4: ON and SW2.4: ON
Basically, my configuration is that:
But I've got some weird signal in TX mode:
Does anyone if this signals are right?
Best regards.
Hi everybody,
I recently purchased the eval-CN0359-eb1z evaluation board.
Do you have some advices ?
If it can help, I have two CN0359 evaluation board,
Kind regards,
Y.
Hi everybody,
I have two questions :
First, I would like to know if it is possible to increase the excitation voltage (with hardware modifications and external power supply for exemple) ?
Second, Is it possible to measure at a lower frequency (down to 1Hz for example) ?
Do you have some advices/step-by-step procedure to help me ?
Kind regards,
Y.
Hello,
I used HMC914 for high speed clock input stage circuit as attached.
When there is no input (no signal connected to the input), the RSSI value is 2.0V and
the LOS is high (3.3V). Then, I tied the two INP & INN pins with jumper cable, but the
RSSI value is the same (2.0V). I replaced the HMC914 device, but the same result I checked.
Any recommendation to debug the current status ?
Thanks in advance.
Tae-Han
in sigma studio, is there a way of flagging a negative number?
I need an output if the number is negative so I can encode it.
Hello,
I have a question regarding TB-KU-115 Xilinx evaluation board (QUATTRO) with 4 FMC connector
and its compatibility to FMCOMMS5 to achieve a 8x8 MIMO system?
Could you please let me know, if you can confirm me the compatibility of FMCOMMS5 with this evaluation platform.
Thanks in advance.
Best regards,
Vaibhav
Hi
i use the ADL355 with a SPI interface. i start my application with a writing to POWER_CTL register to config the ADXL355 to measurement mode, after that i read the X,Y,Z registers every 1 msec. ive noticed that X register brings me a constant 0 while Y and Z gives to me a good results.
any ideas why its happen?
Thanks
Hello.
I have a trouble using four ADRF5020 switches for constructing an antenna switch with two inputs and two outputs (like HMC427ALP3E) in the band 8-18 GHz.
The problem appears when I switch on the system as consistent with biasing-up procedure. Sometimes it happens when I power up VDD and VSS and sometimes when I power up the digital control input "CTRL" ("EN" is set to GND initially). This process causes damage of one or more ADRF5020 which appears in short-circuit of VDD or CTRL circuits to each other or to GND so I guess it is a damage of internal interface schematic diodes.
The system can work initially for some time properly but later damages. I have two grounded sources +5V and -2.5V. There are blocking capacitors on RF-outputs of the system but no blocking capacitors between ADRF5020 swithes.
So I have several questions:
1. In ADRF5020 datasheet external resistors 0 Ohm are mentioned in digital circuits of Evaluation Board. I have no resistors in my circuitry. May be the solution of the problem is in placing resistors of for example 100 Ohm like in HMC547ALC switch?
2. May the biasing-up procedure be disturbed by applying RF-signal from the antenna before powering up VDD, VSS and CTRL pins? (However the problem appears even with unconnected RF-pins) Can the input signal of for example 0dBm be applied before powering up VDD, VSS and CTRL pins?
3. Cab blocking capacitors between ADRF5020 swithes help?
4. Can the use of HMC547ALC switch in organazing such a scheme of several chips be more reliable?
Thank you.
Hi Sir,
As Data sheet, the IP3 is 45dBm(typ.) and I would like to know how many dBc in this IP3 spec. ?
Thanks~
Hi,
Does 4 input pins of AIN0 ~ AIN3 on ADAU1372 have protection diodes internally in the IC ?
Best Regards
Usaghi2
HI,
I am wondering to know the recommended 2.2-2.5 GHz tuning circuit for HMC455. cam anyone help me?
regards,
Delaram
Hi EZ,
We are disty the company name is Arrow in Taiwan.
Our gold customer requirements for more details report (HMC453QS16GE).
Please see the picture below.
Our customer needs 703 MHz to 960 MHz channel bandwidth 200KHz of NB-IoT application.
Do you have any report to us?
HMC453QS16GE datasheet report is incomplete,
the ACPR will be to check how to meet customer needs.
Thx!
I'm working with CM408F on SPI 0 but I have problem to read the answer of the connected slave, see timings below:
CH1: Is ChipSelect
CH2: MISO
CH3: MOSI
CH4: SCLK
I send a command (0x38) on SPI to my slave and I must receive from it 0x2E88.
Scope dump confirm that sent and received data is correct.
But in my program I receive instead 012E88, and after this all rxed data is out of phase of one byte.
I can't find where my program is wrong or a patch to sync again data.
This is my init code (is a fragment):
unsigned baud;
bool cpha, cpol, msb;
volatile uint32_t * reg, wl;
reg = pREG_SPI0_CTL;
*pREG_PORTA_DATA_CLR = SPIENA;
*pREG_PORTA_DATA_CLR = PAD0 | PAD1 | PAD2 | PAD3; // Clear address
// Default values
REG_SPI_CTL = 0x00000010u;
REG_SPI_RXCTL = 0x00000000u;
REG_SPI_TXCTL = 0x00000000u;
REG_SPI_CLK = 0x00000000u;
REG_SPI_DLY = 0x00000301u;
REG_SPI_SLVSEL = 0x0000FE02u;
REG_SPI_RWC = 0x00000000u;
REG_SPI_RWCR = 0x00000000u;
REG_SPI_TWC = 0x00000000u;
REG_SPI_TWCR = 0x00000000u;
cpol = true;
cpha = false;
msb = true;
*pREG_PORTA_DATA_SET = PAD0 | PAD1 | PAD2; // Address = 7
baud = 1; // 2 MHz
wl = 8; // 8 bit
wl = wl / 8 - 1;
REG_SPI_CLK = PERIPHERALS_FREQUENCY / (baud + 1);
if(cpha) REG_SPI_CTL |= ENUM_SPI_CTL_SCKBEG;
if(cpol) REG_SPI_CTL |= ENUM_SPI_CTL_SCKLO;
if(!msb) REG_SPI_CTL |= ENUM_SPI_CTL_LSB_FIRST;
REG_SPI_CTL |= ((wl << BITP_SPI_CTL_SIZE) | ENUM_SPI_CTL_MASTER);
REG_SPI_RXCTL |= ENUM_SPI_RXCTL_RX_EN;
REG_SPI_TXCTL |= ENUM_SPI_TXCTL_TX_EN;
REG_SPI_CTL |= ENUM_SPI_CTL_EN;
*pREG_PORTA_DATA_SET = SPIENA;
REG_SPI_ICLR = BITM_SPI_ILAT_CLR_TF | BITM_SPI_ILAT_CLR_RF | BITM_SPI_ILAT_CLR_TS | BITM_SPI_ILAT_CLR_RS;
To send and receive data I use:
unsigned SpiSend(int spiNum, unsigned data)
{
volatile uint32_t * reg, d;
switch(spiNum)
{
case 0: reg = pREG_SPI0_CTL;
break;
case 1: reg = pREG_SPI1_CTL;
break;
case 2: reg = pREG_SPI2_CTL;
break;
}
REG_SPI_TX = data;
REG_SPI_RXCTL |= ENUM_SPI_RXCTL_RTI_EN;
REG_SPI_TXCTL |= ENUM_SPI_TXCTL_TTI_EN;
while(!(REG_SPI_STS & BITM_SPI_STAT_SPIF));
REG_SPI_TXCTL &= (~ENUM_SPI_TXCTL_TTI_EN);
REG_SPI_RXCTL &= (~ENUM_SPI_RXCTL_RTI_EN);
return REG_SPI_RX;
}
I hope someone can help me because I do not know what fish to catch!
Regards
Manuele
Hello professor,
In the datasheet of HMC681A, there is an index of relative phase vs frequency. Could you please explain, what relative phase is, for me? And the datasheet just list the applications of 50 to 350MHz tuning and 350 to 1000MHz.
If the signal I used is lower than 50MHz, what about the performance of HMC681A, especially its impact on the signal phase? If you can recommend other chips whose impact on the signal phase relatively small, it would be great.
Thanks for answering.
Hi,
I just received two evaluation boards of the RF amplifiers HMC751 and HMC963. They didn't come with any heat sink attached but in the datasheet I read "The evaluation board should be mounted to an appropriate heat sink". Is it totally necessary? If it is, are there specific models of heat sinks that I can buy for such small boards?
Many thanks in advance.
All the best,
Pascual
Hello!
I'm looking at the ADL5611 evaluation board for testing a gain block design, I'm having some difficulty finding the SMA connector details online - aside from the pysical ADL5611 datasheet and the gerber files included, both DigiKey and ADI don't provide too much detail on the BOM for the EVAL board - I can see from one image that the input SMA connector is an SMA-Male type, but I can't tell what the gender is of the RF output - is it SMA-Female, or SMA-Male as well? Thanks in advance
Hello,
I met a timing issue during write/read register of AD724-4. Write 8085 to register 001001 and read back. The read back data is 8084, not 8085. Could you please help to look into this issue? I attached the write/read back timings, please check.
Hi dear support,
I have question about converting read value from register to real value of meassured active, reactive, apparent power and similiar registers. Which equation or procedure is used for this?
For calculating URMS and IRMS i followed equation ona page 8 of AN-1118, where you calculate constant for known voltage/current, multipled constant and read value from URMS/IRMS register give you a real value of voltage/current.
Please help me because I don't know which is right approach for this problem.
Best regards, Darijo
Hi
We are using ADAU7002 with INMP621 microphones. Occasionally we have found an unusual DC offset introduced. We've also found that the condition can be forced to happen by interrupting the clock signal briefly.
The data is serialised with a number of other microphones using an Altera device. I do not know enough about that process to know if that could introduce the problem - that is a possibility that we are discussing.
Are there any know issues that could cause this? We have noticed a DC offset is normal (around 3%) but when this situation occurs there can be many different offsets (thinking about that, perhaps that suggests the serialiser?).