Quantcast
Channel: EngineerZone : Discussion List - All Communities
Viewing all 51060 articles
Browse latest View live
↧

LT3795 SIMULATION ISSUE

June 26, 2018, 11:24 am
$
0
0

Hi everyone:

 

Related with the LT3795 Demo Circuit  on your website. I running the simulation with original input voltaje and everything is OK.

 

The situation is when I change the input voltaje to 45 Vdc or more, the LT3795 goes down. I have checked the resistor between EN/UVLO and OVLO pins and are on the correct value. Could you confirm that simulation circuit runs at Vin=45Vdc or more???

 

The other question is realeted with the same demo circuit, my application is going to be the same but I need that it works with an input voltaje between 50 VDc and 80 Vdc and exactly the same output parameters. what you think, it is possible?

↧
Search

How to multiplex the GPIO pins of the ADSP-BF706?

June 23, 2018, 4:54 am
$
0
0

There are two bits to select one of four possible connections for each GPIO pin.

How to control those two bits?

↧
↧

Decoding (possible) ADV202 generated stream with software

June 26, 2018, 2:25 pm
$
0
0

Hello,

 

I'm decoding a JPEG2000 stream from a source that seems to be using ADV202 to encode the data. The manufacturer simple says that the stream is 'JPEG2000 compatible', but the first bytes of every frame are the ones that define the ADV202 header, that is, FF FF FF F0 [Compressed image index], etc.

 

I found out that the code stream compressed image index (the 4 bytes that follow the field header FF FF FF F0) is repeated in 4 packets and then incremented, that is, the full image is divided in 4 'subimages'. Each part starts with the ADV202 field header and is followed by the JP2 id bytes (00 00 00 0C 6A 50 20 20 ) and the usual JP2/J2K markers, up to a EOC (FF D9) marker, with padding 00s later.

 

I'm trying to reconstruct the image by decoding the JPEG2000 in each one of the 4 packages and later combine the decoded images in a single one (the number of columns of each one of the 'subimages' is exactly 1/4 of the full image). This is not working, I'm able to decode each part but the image pattern is not what is expected - tried different decoders such as Irfanview, Kakadu and OpenJPEG2000 with the same results.

 

The attached image is one of these subimages decodeed, the reference is a black image, it is OK for 2/3 of the image but the rightmost 3rd is not black as expected:Decoded JPEG2000 subimage

 

Maybe the 4 packets must be combined somehow before decoding?

 

Most of the info that helped me to get this far is from this forum so thanks in advance.

↧

Any working examples for a polling SPI driver?

June 26, 2018, 7:04 am
$
0
0

We have developed a custom board using a BF70X part.  I have the SPI working but it always shuts down before the last byte is finished being sent out when monitoring the status of the FIFO TX buffer.  The FIFO is empty, but that last byte is still getting shifted out in the shift register when the SPI gets shut down.

 

I tried using the SPIF bit as the documentation says "The SPI_STAT.SPIF bit indicates that a single word transfer is complete"  The documentation also says "To maintain software compatibility with other SPI devices, the SPI_STAT.SPIF bit is also available for polling."  But this bit never changes.  It is always 1.   Is this a Silicon defect?

 

 

So I have 2 related questions.

1. Is there a way to clear the SPIF bit so that it actually reflects 0 during a transfer and 1 when it is finished?

2. If not how can I monitor when the SPI has finished sending out that last byte.

 

Obviously I could hack something together to put a delay on that last byte before shutting down the SPI, but that is poor coding and I want to avoid it at all costs if possible.  

 

Thanks

Greg

↧

ltc3703 current limit

June 25, 2018, 4:45 am
$
0
0

Hi, 

I have a problem with the current limit function of the device.

I disabled the function but the IC still limit the current while the voltage at the RUN/SS-Pin is reduced.

I only have a load current of 0,5A@24V output voltage.

I didn't understand what happens inside the LTC3703.

 

Has anyone an idea ??

 

Regards

↧
↧

ADL5610/1 v.s. ADL5544/5 not need to limit the supply current?

June 19, 2018, 1:03 am
$
0
0

Hi all,

 

Following is datasheet comment,

"The only external components required are the input/output ac coupling capacitors, power supply decoupling capacitors, and dc bias inductor."

 

The general gain block amps need to dc bias inductor and/or dc bias resistor to select dc bias resistor to achieve the supply current.

 

Is it correct, not need to limit the supply current, with dc bias resistor ?

 

Best regards,

sss

↧

AD9102 DAC datapaths function

May 25, 2018, 1:08 am
$
0
0

Hi all,

 

The DAC INPUT DATAPATHS @ AD9102 have the following two functions.

DAC digital gain multiplier, and a DAC digital offset summer.

 

Other DDS series perhaps does not have these functions, only to the best of my knowledge,but only in my experience.

We can not understand these functions.


The 14-bit samples are input to the DAC @ AD9102, but these function are 12-bit value.

The 12-bit value shift to MSB or LSB? Then, results ?

 

Please advise how to use these functions,and to calculate the datapath value.

 

Best regards,

sss

↧

Three LTM8056s parallel operation

June 26, 2018, 5:43 pm
$
0
0

Hello

 

Our customer would like to use three LTM8056s parallel operation for needed power.

The datasheet and evaluation board manual describe two LTM8056s example.

 

Can we use three parallel operation of LTM8056?

For example, we design 3 parallel LTM8056s using IOUTMON , CTL, SYNC and CLOKOUT as datasheet P.22  bottom circuit example (180 degree phase out).

 

In that case,

I think that three parallel operation  can be used though the ripple may be increased by two LTM8056s of same phase .

Is my understanding correct ?

 

If we should use external clock source ( 0 degree, 120 degree, 240 degree of phase )  for three parallel operation,

please let me know your advice.

 

Regards,

Terumasa

↧
Search

AD9914 SYSCLK and SYNC_CLK reset

June 11, 2018, 11:27 pm
$
0
0

Hi all,

 

When the PLL is bypassed, how to retime the SYSCLK and SYNC_CLK ?

Is it only a way to do it, do the MASTER_RESET ?

 

Best regards,

sss

↧
↧

The signal transmission about the AD9371

June 20, 2018, 7:26 pm
$
0
0

    I set the TX/RX LO  750MHz, and the TX IQrate 307.2MSPS, and the RX IQrate 153.6MSPS, when I transe the 5MHz signal ,the RX signal is perfect, but when I transe the 30MHz signal ,the RX signal is distortion .

 

the parameters I configure the AD9371.

the transaction parameters.

there is the signal envelope  in the RX signal.

When  I transe the5MHz， the RX signal is perfect.

↧

Pin(pad) material of LTM4605

June 26, 2018, 7:10 pm
$
0
0

Hello,

 

I've received a question form our customer. The customer would like to know material of Pin (pad) of LTM4605. We can get attached TABLE OF MATERIAL DECLARATION in ADI WEB site. But I'm not sure which is pin material. Could you please advise me about that?

 

Best regards,

Akira

↧

input bias current return path vs. resistor noise

June 26, 2018, 6:01 am
$
0
0

Hallo,

 

after going through some application notes for instrumentation measurement I need some expert advice for an analog frontend.

 

I have to measure very precise a DC voltage across a floating 10k resistor in two cases

 

a) U < 200nV

b) U = 10V

 

The setup is in a stable lab environment and I am not constrained otherwise.

 

As I understand it, the bias resistors should provide a symmetric path to ground form each opamp input.

Also, it should be much larger than my 10k source, maybe 5Meg?

But low enough no to introduce too much noise.

 

Which is the lowest resistor value I can use to keep thermal noise low and in combination with which opamp?

 

Alternative:

Could I get away with unsymmetrical bias resistors?

Can I connect only one opamp input via a low value resistor to gnd and accept the additional offset voltage created at my DUT?

For example use low input bias current devices like the AD8220B in case a) and the ADA4530-1 in case b) ?

 

Thank you for support.

 

Kind regards,

Chris

↧

LT1362 : Differential Input Voltage

June 20, 2018, 12:46 am
$
0
0

Hello,

 

I have a question about LT1362 from our customer.
In the absolute maximum ratings, the Differential Input Voltage is explained as followings.

 

  Differential Input Voltage
    (Transient Only) (Note 2).......... ±10V

 

and the "Note2" is as followings.

 

  Note 2: Differential inputs of ±10V are appropriate for transient operation
  only, such as during slewing. Large, sustained differential inputs will cause
  excessive power dissipation and may damage the part.

 

The customer wants to know the maximum rating of constant voltage which are input to differentional input, not a transient.

 

Could you please tell the maximum differential input level of DC to me ?

 


Best regards,
ysuzuki

↧
↧

Reading single RX input in GNURadio?

June 26, 2018, 1:06 pm
$
0
0

I am in a student group, where we are trying to use the PicoZed SDR 2x2 SOM system with the ADL9361 as a software-defined radio. We have an RF front end system that is plugged into one of the SMA connectors on the breakout board. However, we are having difficulties reading from any of these ports in GNURadio Companion. Can someone help us read this connection, or any SMA connection on this system, in GNURadio?

↧

formula for phase noise calculation of amplifier

June 26, 2018, 4:58 am
$
0
0

formula for phase noise calculation of amplifier

↧
Search

HMC703LP4E reference input slew rate

June 26, 2018, 8:54 pm
$
0
0

Hi all,


In the datasheet,
Slew rate of greater or equal to 0.5 V/ns, it is recommended at low frequencies, a relatively square reference is recommended to keep the input slew rate high.

 

Is it only rising, falling, or both edges ?

In general,, Falling edge degradates the slew rate.


Best regards,

sss

↧

how to remove unwanted modules from ip core?

June 21, 2018, 1:51 am
$
0
0

i want to remove unwanted modules from the ad9361 and reconfigure it. Is it possible to remove directly from the block diagram itself?

↧
↧

Unipolar input to Differential ADC

June 26, 2018, 9:05 pm
$
0
0

Hi,

 

I have a linear image sensor application where the output signal from the sensor is a unipolar signal ranging from 0-3V. I want to convert this signal into a differential signal for ADC. The input signal can be considered as a DC signal since I am sampling the charge accumulated on a capacitor. 

 

The problem I have seen in using FDA such as ADA4932 was that the output signal clips due to the input range being high. I cannot put a series capacitor eliminate the DC since my signal is actually a DC.

 

Are there any recommendations about how to interface the sensor and the differential ADC?

 

Thx

↧

ad7190 drift with time

March 24, 2016, 2:56 am
$
0
0


Hello

we are using AD7190 in our design .

We are wondering why the output data drift with time .

Here is the output data within 4 minutes (analog input was shorted):

uu.bmp

55.PNG

it will be stable after 5 or 6 minutes .but why this happen at the 5 minutes beginning ?

Best regards

↧

ADE7753 Current Conversion problem

June 25, 2018, 1:11 am
$
0
0

Hi Everyone,

I have started using ADE7753 recently. I was successful in reading the voltage register. 

Iam giving current through CT. The output of CT generates nearly 40mV @ full scale current. So I have selected an input range of 0.125V for current channel (V1P/V1N). Gain is set at '1'.

As per the datasheet the current register value should be 18,68,467d @ full scale ac-signal. I assume the register value equals 18,68,467d at a value of 0.125V (125mV). But to my surprise the value is reached at a voltage of 0.046V (46mV). When i give an input signal of 0.092V (92mV) iam getting a value around 37,00,000d.

What is the reason for such a behaviour.?

↧
Viewing all 51060 articles
Browse latest View live
Search
<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>