Questions about AD9279 Reference Design

The design: AD9279 Evaluation Board, ADC-FMC Interposer & Xilinx ML605 Reference Design [Analog Devices Wiki]

I am reading the data from Microblaze but not sure how it is arranged for all 8 channels.

  xil_printf("Starting capture...\n\r");

  adc_capture(16, DDR_BASEADDR);

  delay_ms(10);

 

 

  for (n = 0; n < 16; n++) {

    xil_printf("Sample[%d]: %04x\n\r", n, Xil_In32(DDR_BASEADDR+(n*4)));

    }

The output is:

Starting capture...

Sample[0]: F92F5FC

Sample[1]: C9A53FF2

Sample[2]: F1C75C3

Sample[3]: D6FFDF38

Sample[4]: FBEFBBA

Sample[5]: B6B77FFE

Sample[6]: FBE747B

Sample[7]: F9FFFBFB

Sample[8]: F92B16A

Sample[9]: 7ACB4C48

Sample[10]: F34FCD3

Sample[11]: 13FF2B4C

Sample[12]: F9A6DE7

Sample[13]: C0DF1D69

Sample[14]: F462612

Sample[15]: D9FF59DC

Does anyone know?