Hi,
We bought an evaluation board EVAL-ADV7613FEBZ from digi-key last week.
I couldn't find any hardware user guide and how to bring up this board.
Is there any special jumper settings/HDCP/modification/programming is required to view the HDMI output on a display when HDMI input is provided. Also, it looks like board does not detects HDMI source from my laptop/any source.
we need to start firmware development for our customized board. Please help on this ASAP.
Regards,
Nanthan.
I am trying to download SPIController_Setup.exe on my win 10 computer and receive the following error:
550 Folder /pub/adispi/A2DComponents/Install/SPIController_Setup.exe not found
Is there another path for this download?
Hi,
I am attempting to communicate with an ADV7180 using an STM32 microcontroller over I2C and getting no response (no ACK when sending the slave address, even when scanning through the entire range of I2C addresses). I am trying to establish whether the chip is damaged or not. I am reasonably sure the crystal is not oscillating but don't have access to an oscilloscope to test.
Am I correct in assuming the ADV7180 only requires power to the supply voltage inputs (DVDD, DVDDIO etc), and should respond to I2C signals without a running pixel clock?
What is the maximum supply current that the HMC8410 can handle without damaging it? I am thinking of using the TPS2553 load switch from TI to limit the current into the HMC8410, but it seem like the load switch can allow up to 100mA. Will this damage the HMC8410?
Also, what is the maximum current required for VGG1? Can I control it with a 2mA source?
Thanks,
-Andrew
Using ADI's no os for AD9371, I am seeing problems using the tone generator with DAC_SRC_DDS where the tone is at double the configured frequency. I configure single tones (1MHz, 2MHz, 3MHz and 4MHz) on the 4 channels and can see two on TX1 and two on TX2, just at double the frequency.
Tx profile in RadioVerse is Tx 20/100MHz, IQrate 122.88MSPS. When using the Transmit Data function in RadioVerse and configure a 1MHz tone, I can see that correctly in RadioVerse and on the analyzer. Sampling frequency is greyed out/hardcoded to 122.88MHz in RadioVerse.
In no-os, the console reports initializing the dac core at 61MHz. I think that is incorrect and should be double to match RadioVerse.
Please wait...
MCS successful
CLKPLL locked
AD9371 ARM version 4.0.6
PLLs locked
Calibrations completed successfully
RX_XCVR initialization OK
TX_XCVR initialization OK
RX_OS_XCVR initialization OK
DeframerStatus = 0x60
dac_setup dac core initialized (61 MHz).
adc_setup adc core initialized (31 MHz).
deframerStatus (84)
Done
myk.c:
static mykonosTxProfile_t txProfile =
{ /* Tx 20/100MHz, IQrate 122.88MSPS, Dec5 */
DACDIV_2p5, /* The divider used to generate the DAC clock*/
&txFir, /* Pointer to Tx FIR filter structure*/
2, /* The Tx digital FIR filter interpolation (1,2,4)*/
2, /* Tx Halfband1 filter interpolation (1,2)*/
1, /* Tx Halfband2 filter interpolation (1,2)*/
1, /* TxInputHbInterpolation (1,2)*/
122880, /* Tx IQ data rate in kHz*/
20000000, /* Primary Signal BW*/
100000000, /* The Tx RF passband bandwidth for the profile*/
710539, /* The DAC filter 3dB corner in kHz*/
50000, /* Tx BBF 3dB corner in kHz*/
0 /* Enable DPD, only valid for AD9373*/
};
Currently, no-os produces the output in the attached screenshot (just one tone for simplicity sake), a 2MHz tone instead of 1MHz as configured in headless.c shown in the right. In the bottom left is the console, to match RadioVerse sample rate, I think it should say:
dac_setup dac core initialized (123 MHz).
To try and match the example output from the wiki, I selected in RadioVerse the Tx 75/200MHz and Rx 100MHz profiles which printed the 123MHz in the console for adc and dac, however I still get the tones at double the configured frequency.
What would be a cause for DDS tones to come out at double the frequency in no-os that doesn't happen in RadioVerse?
Thanks
Using ZC706 and ADRV9371, we have been working on our no-os code and have working DDS and was just working through DMA issues when Analog released their no-os code. Since it seemed Analog's was just as far if not further and would get better support, I decided to switch over to that. Unfortunately, I can't get the jesd stuff to come up properly.
In our no-os implementation, I did have a problem that I was just working around. When programming the FPGA, the very next application launch would result in failed jesd bring up and I'd just see LO leakage. If I didn't reprogram the FPGA or reset the system, then it would work. I took this as an initialization issue and would circle back once other things were working.
Here is the console output right after FPGA programmed when it doesn't work right:
SUCCESS: MYKONOS_waitInitCals
SUCCESS: Calibrations completed successfully
SUCCESS: MYKONOS_enableSysrefToRxFramer
SUCCESS: MYKONOS_enableSysrefToObsRxFramer
SUCCESS: MYKONOS_enableSysrefToDeframer
SUCCESS: MYKONOS_resetDeframer
SUCCESS: MYKONOS_enableSysrefToDeframer
SUCCESS: MYKONOS_readRxFramerStatus (3E)
SUCCESS: MYKONOS_readOrxFramerStatus (3E)
SUCCESS: MYKONOS_readDeframerStatus (21)
SUCCESS: MYKONOS_enableTrackingCals
SUCCESS: MYKONOS_radioOn
SUCCESS: MYKONOS_setObsRxPathSource: OBS_RXOFF
SUCCESS: MYKONOS_setObsRxPathSource: OBS_INTERNALCALS*** EVERYTHING INITIALIZED ***
SUCCESS: MYKONOS_jesd204bIlasCheck (D8)
Note, when I saw SUCCESS: MYKONOS_readDeframerStatus (21) and MYKONOS_jesd204bIlasCheck (D8), I knew that things were not working and the analyzer would confirm with just LO. Just running the application again would result in good jesd and the tones were observed on the analyzer as expected.
SUCCESS: MYKONOS_waitInitCals
SUCCESS: Calibrations completed successfully
SUCCESS: MYKONOS_enableSysrefToRxFramer
SUCCESS: MYKONOS_enableSysrefToObsRxFramer
SUCCESS: MYKONOS_enableSysrefToDeframer
SUCCESS: MYKONOS_resetDeframer
SUCCESS: MYKONOS_enableSysrefToDeframer
SUCCESS: MYKONOS_readRxFramerStatus (3E)
SUCCESS: MYKONOS_readOrxFramerStatus (3E)
SUCCESS: MYKONOS_readDeframerStatus (68)
SUCCESS: MYKONOS_enableTrackingCals
SUCCESS: MYKONOS_radioOn
SUCCESS: MYKONOS_setObsRxPathSource: OBS_RXOFF
SUCCESS: MYKONOS_setObsRxPathSource: OBS_INTERNALCALS*** EVERYTHING INITIALIZED ***
SUCCESS: MYKONOS_jesd204bIlasCheck (4)
When I saw SUCCESS: MYKONOS_readDeframerStatus (68) and MYKONOS_jesd204bIlasCheck (4) (or just 0), analyzer showed expected output.
So when I plugged in the Radioverse generated files into the ADI no-os, I was surprised to have worse initial results:
Please wait...
MCS successful
CLKPLL locked
AD9371 ARM version 4.0.6
PLLs locked
Calibrations completed successfully
RX_XCVR initialization OK
TX_XCVR initialization OK
RX_OS_XCVR initialization OK
RxFramerStatus = 0x20
DeframerStatus = 0x21
dac_setup dac core initialized (61 MHz).
adc_setup adc core initialized (31 MHz).
ERROR: [MYKONOS_jesd204bIlasCheck] Error:
ERROR: [MYKONOS_jesd204bIlasCheck] deframerStatus (D8)
Done
RxFramerStatus is either 0x20 or 0x25. The MYKONOS_jesd204bIlasCheck deframerStatus is always 0xD8 instead of 0 or 4 like I want to see. Skipping FPGA reprogramming and resetting the system each time did not work around it like it did in our no-os code.
Is it as bad assumption that Radioverse will only generate valid profiles? I thought there was error checking/prevention such that Radioverse would prevent invalid settings. Before, when our no-os was not working as expected, I blamed that on initialization code not being quite correct. But when the ADI no-os doesn't work out of the box, and all I had to do was generate profiles and add them to the code, that makes me suspect the profiles are bad.
Any suggestions on where to focus my debugging efforts? In the ADI code, the first sign of problems is the xFramerStatus' not being as expected. It would be nice to get our no-os code working, but at this point, it's more important for me to get the ADI no-os code working properly.
Thanks in advance for any advice.
We want to use the AD9643 ADC to implement the equivalent time sampling technique in order to measure periodic pulses of 1 ns of duration (FWHM). We need an ADC with a full power bandwidth about 1 GHz but we want to operate the ADC at low input clock frequencies about 5 to 40 MHz.
In the data sheet is specified the maximum input clock frecuency (625 MHz) but there is not information about the minimum input clock frequency at which the ADC can work
I found this page and want to ensure this feature is supported by Buildroot. I want to be able to hibernate at 9.9mW.
https://blackfin.uclinux.org/doku.php?id=power_management_support
How does a guy get started with this processor without breaking the bank or rolling his own board? Looking for a development board about the cost of an RPi; Are there any?
Hi,
We're using an ADP5062 in one of our products to charge a Li-Ion cell. Most of the time it works perfectly, but in some situations, it will keep charging the battery until the protection module disconnects the battery at 4.3V.
VTerm is set to 4.2v. Our other settings are:
We've gone through the settings many times, but cannot work out why this overcharging condition is happening. Are there reasons you can see that this may be happening?
Regards,
David
Hi All,
One of my customer has trouble with AD654 V/F Converter in his renewal design.
The current design circuit is shown in attached document.
As shown in the attached sheet, the output terminal of AD654 (FOUT) is connected to photo-coupler input and is pulled up to +15 supply through 1.5kohm and LED in the photo-coupler.
In this configuration, the problem is the current at FOUT terminal at logic 1 state.
The output voltage scope shot is also attached the same sheet.
As shown in the scope shot, FOUT waveform is not stable at logic 1 state thus the pin5 of photo-coupler shows erroneous pulse output.
Could you advise us what is cause this problem?
Best Regards,
Ricky
Hello,
I have a question about 5V tolerant pins of ADV7611.
Question :
Do all of following pins support 5V tolerant?
(A signal below 5.3V can input to these pins without power.)
1pin HPA_A/INT2
62pin DDCA_SCL
63pin DDCA_SDA
64pin RXA_5V
Datasheet says:
On Page 4, The following pins are 5 V tolerant: DDCA_SCL, DDC_SDA, and RXA_5V.
On Page 7, The following inputs are 3.3 V inputs but are 5 V tolerant: DDCA_SCL and DDCA_SDA.
On Page 8, HPA_A/INT2 Miscellaneous digital A dual function pin that can be configured to output
a Hot Plug assert signal (for HDMI Port A) or an Interrupt 2 signal. This pin is 5 V tolerant.
On Page 9, 62 DDCA_SCL HDMI input HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input
that is 5 V tolerant.
63 DDCA_SDA HDMI input HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input
that is 5 V tolerant.
Thank you!
Best regards.
ADC is stable in operation. However, if work is performed at SPI with other consumers (CS = 1 for ADC), then ADC stops working - it is not possible to read registers, data is also incorrect.
Hi,
We bought an evaluation board EVAL-ADV7613FEBZ from digi-key last week.
I couldn't find any hardware user guide and how to bring up this board.
Is there any special jumper settings/HDCP/modification/programming is required to view the HDMI output on a display when HDMI input is provided. Also, it looks like board does not detects HDMI source from my laptop/any source.
we need to start firmware development for our customized board. Please help on this ASAP.
Regards,
Nanthan.
Hello,
I am using channels 0, 1 and 2 of the AD7682 to sample analog signals. I've detected and error in the configuration of channel 2 so, to debug, I am accessing each channel without sequencer. The first word sent is the configuration and then I've always sent 0's. The readback configuration in each case is:
Channel 0: Cfg register: 0x3848 --- ReadBack value: 0x3848
Channel 1: Cfg register:0x38C8 --- ReadBack value: 0x38C8
Channel 3: Cfg register:0x39C8 --- ReadBack value: 0x39C8
Channels 0 and 1 are connected to analog signals while channel 3 is tied ground. Until here all configurations seems to work properly. The problem is related to channel 2 who is connected to an analog signal.
Channel 2: Cfg register: 0x3948 --- ReadBack value: 0x3CA4
As it can be seen, configuration read is different from the one written. I have no idea where can be the problem since the piece of code used to configure each case is the same.
Any idea would be appreciate.
Thank you in advance.
I used three ADV7393 chip to produce 3-channel NTSC signal, channel 1 is CVBS signal, channel 2 is YPBPR signal, channel 3 is RGB signal, but I found RGB output image brightness was dark, and contrast is not very normal. The following is the ADV7393 configuration information;
1. CVBS:
reg0x17 = 0x02
reg0x00 = 0x1C
reg0x01 = 0x02
reg0x80 = 0x10
reg0x82 = 0xCB
reg0x88 = 0x00
reg0x8A = 0x0C
reg0x8C = 0x1F
reg0x8D = 0x7C
reg0x8E = 0xF0
reg0x8F = 0x21
2. YPBPR:
reg0x17 = 0x02
reg0x00 = 0x1C
reg0x01 = 0x00
reg0x80 = 0x10
reg0x82 = 0xC9
reg0x8A = 0x0C
3. RGB:
reg0x17 = 0x02
reg0x00 = 0x1C
reg0x01 = 0x00
reg0x02 = 0x10
reg0x80 = 0x10
reg0x82 = 0xC9
reg0x8A = 0x0C
Hello
AD7626 datasheet rev.D P.6 says below
" if CNV+- is left idle greater than 10,000ns subsequent conversion result is invalid".
Can I get valid data if I read the conversion results two times within the time between conversion specification ?
In other words, is next conversion result after one dummy cycle valid result ?
Our customer system always do not need to read the conversion result and it starts to read conversion results at 10Msps when there is any trigger inputs .
So, CNV+- may be left idle greater than 10,000ns.
Please let me know your advice.
Regards,
Terumasa
Hello,I have some questions about AD9910 to consult.I want to use AD9910 to generate a circular sweep signal source .
The limit of sweep frequency:1MHZ—21MHZ
Step size:100HZ
Rate size:50ns
According to parameters set above,the total sweep time from 1MHZ to 21MHZ is 10ms,the Fsysclk is 800MHZ,belong are some parameters I wrote to the registers.
CFR1:0x00804200
CFR2:0x004e0820
CFR3:0x140f4128
DRLIMIT: 0x06b851ec0051eb85
DRSTEP:0x0000021900000219
DRRAMP:0x000a000a
(1)I find the step size of output is 50HZ ,and I messured the output of DROVER pin(in picture 1 belong).the period of DROVER output is 10ms.does the shape of the pulse look a little abnormal?
(2)Accroding to DROVER pin,the total sweep time of output is 10ms.so does it mean the actual rate size is 25ns? why is it different from what I set?
(3)what is more,when I double the value of step size in register,then the step size of output become 100HZ but the total sweep time of output become 5ms.I was confused.I want to know that how I can do to keep the step size 100HZ while the total sweep time is 10ms.
I hope i have express my problems clerly,and I'll appreciate it if my problems can be solved.
Thank you.
Hello Guys,
I am developing PDM MEMS mic with ADAU1451. We are using 48k UltraSound Mems. What is decimation ratio on ADAU1451 PDM Mic interface? Is it adjustable?
Jason
When installing and running PixelPulse2 (v0.90) in a Windows 10 laptop everything installs fine, but when I run the application I simply get a plain white screen (as shown below). Any ideas on the problem? The laptop is quite old Thinkpad, so perhaps some issue with the required video drivers,
