How is RSSI measured and when can we read it?

January 27, 2017, 4:00 am

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Hi, we're working with a PicoZed SDR (using AD9361) and have tried to understand how the RSSI is accumulated and when it can be read by looking at the datasheet and searching this forum for similar references but we're still confused.

 

1.     For a TDD application, we are using rssi-restart-mode 2 (restart RSSI algorithm when the AD9361 enters rx mode). If the rx signal is asserted at the beginning of the slot and cleared at the end of slot, is the RSSI wait value used by the AD9361 or does it use only the RSSI delay value at the beginning since there is only one receive packet each slot?

2.     Can the user application read the RSSI anytime during that the AD9361 is accumulating the RSSI value and get a valid RSSI value? From the documentation, it would seem that the application should wait until the AD9361 has completed its accumulation, but I want to confirm.

3.     If the user application waits until the end of the slot to read the RSSI, then the RSSI value remains in the register even if the accumulation stopped earlier as specified by the RSSI duration value, is that correct? For our configuration, the rx signal is not asserted again until the next slot, so we should be able to read the RSSI value later.

     FYI, we can design the PL side to trigger interrupts for specific events during the slot to the PS side to allow our PS software driver to go read the RSSI value in real time.

Thank you.

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questions of UG992

June 6, 2017, 5:10 am

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in ug992 p202,Tx ATTENUATION CONTROL ->API Description ,it says"

Use the the MYKONOS_setupGpio() function to properly configure cross-point and I/O buffers.

"
in the description of MYKONOS_setupGpio() in p187,it described 4 mode to set.
the question is:which mode of the four should i choose to set to meet my Tx ATTENUATION CONTROL(p201) operations?seems none of them is right.

 

 

2,in p187,i think there is sth wrong with the doc,in the description of GPIO_SLICER_OUT_MODE,the sentence "

See the ARM GPIO Interface section for more details.

" shoulde be "See the SLICER API COMMANDS AND GPIO INFORMATION for ...",the SLICER API COMMANDS AND GPIO INFORMATION is in p149.

AD7616 Conversion Results

June 6, 2017, 4:46 pm

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I'm using an AD7616 in SPI serial interface 1-wire mode.

 

I've put the AD7616 into digital interface self-test by writing a 0x86BB to the Channel Register. I can read the register to verify that it is set correctly. In fact, I can write and read all registers without any problems.

 

The problem is the first conversion returns 0x0038 and 0x0039 instead of the test values. Subsequent conversions always correctly return the test data. 

 

The datasheet implies that the next SPI transfer after a conversion will clock out 32 bits of data without the pipelining experienced when reading the registers. 

 

Should I be getting the correct data or do I need to throw out the first conversion results?

 

Thanks,

 

Kevin

AD7616 unused Analog input pins

June 7, 2017, 2:21 am

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Hello,

 

How should unused analog input pins (VnA/B and VnA/BGND) be terminated?
Left Open, connect to GND, differential termination or else?

 

Best Regards,

AD9656 - SPI Initialization problems

May 17, 2017, 8:51 am

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I try to initialize AD9656 according datasheet. Write (1 << 5) | (1 << 2) to the address 0x0, the readback is 0x1A looks like bit1 is set and LSB mode is selected - but value must be 0x18.

 

 

I check the incoming data using debug print  as well as checking SDIO line with oscilloscope. And when I write data as I mentioned above, I see not 0x18 but 0x1A while reading register at 0x0.

 

But the data mode is still MSB - ADC understands incoming address, separate whether the command type is write or read.

 

Moreover the readback from some registers are not the same according to written values.

For instance  - write 0x55 at 0x3B but got 0x54 (checked with oscilloscope).

 

Thanks in advance!

AD9371 evaluation board ADRV9371-N/PCBZ sampling rate

May 3, 2017, 7:38 pm

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Dear Sir/Mdm,

 

I am wondering is it possible to change the AD9371 evaluation board ADRV9371-N/PCBZ sampling rate via the adjustable setting?

 

Best Regards,

Cho Shao Ying

How to get Fmcomms4 source and sink block in gnuradio.

June 6, 2017, 2:51 am

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Please give valid links from where to download these in linux environment, i am using fmcomms4 board with zed board.

Speedup when using ICE-2000 instead of ICE-1000 on SC584

May 31, 2017, 12:58 am

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Hi,

what is the expected speedup for loading a big SC584 application when using ICE-2000 instead of ICE-1000 emulator?

I'm loading an application which has a size of 35MBytes (where 33MB are for core 1 i.e. SHARC0). This takes about 75 seconds with the ICE-2000 and about 3 minutes with the ICE-1000. I expected a bigger speedup because I can now set the JTAG clock to 46MHz instead of the 5MHz used by ICE-1000 (CCES connection test passes).

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AD9467 +interposer FMC+ LM605 capturing data

May 24, 2017, 7:36 am

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Dear all,

I am working  with the LM605 xilinx, the AD9467 Evaluation Board and the FMC interposer. I have followed the documentation that you provided form the analog devices wiki: https://wiki.analog.com/resources/fpga/xilinx/interposer/ad9467

I uploaded the bit file to the FPGA and I have checked a sinusoidal signal using chipscope busplot to see the captured signal. The system is working correctly after checking the messages through tera-term.

But I would like to save all data from the DDR3 512MB to my computer.  In order to print data to the UART terminal, I modified the cf_ad9467_ebz.c including the attached code at the end:

*********************************************************************

xil_printf("testing DMA acquisition . . . \n\r");
  adc_capture(50000, DDR_BASEADDR);
  for(i=0;i<50000;i++)
  {
      xil_printf(".");
      rdata = Xil_In32(DDR_BASEADDR+(i*4));
      xil_printf("data[%d]=0x%x\r\n",i,rdata);
  }
  xil_printf("cleaning up.\r\n");
  cleanup_platform();
  xil_printf("done\n\r");

************************************************************

I performed the project in the following steps:

1)      Using iMPACT, programmed the FPGA with the initial system.bit from XPS provided by the wiki page of analog device

1)      Opened the reference design in XPS. Built netlist and bitstream, then exported to SDK.

2)      Created new “Hello, World!” project in XPS. Replaced contents of helloworld.c with contents of cf_ad9467_elf.c

3)      Built the project (“Debug” configuration. Attempting “Release” as I type this message)

4)      The elf file was built from SDK itself
Then I went to the Project Explorer (left hand side), expanded "sw -> Binaries", I saw the helloworld.elf file. Right click and then "Run As -> Launch on Hardware".

The chipscope was launched and I had a UART terminal ready before you run the software.

The system doesn´t respond and I need to restart the LM605 board due to the chipscope is not working and SDK doesn´t respond.

I am wondering how could I print data to the UART terminal without changes on the bit file.

If I decide to use XMD tool to connect to the FPGA and read the data directly from the memory, I can find an example of a tcl script here. How could I use it in SDK? I need to create elf file and launch to the FPGA?

There is an example of how could I save or print data using an analog device ADC with the LM605?

Thanks in advance

Regards

Carlos

ADZS BF 548 Hanning window output

June 7, 2017, 3:40 am

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Hi everybody

 Iam new to Blackfin,with the below source code iam trying for Hanning window programming,how to see the hanning window in VDSP++ 5.1.2.

can any one suggest sssimple code for Hamming window.

 

Thanks for reply in advance.

 

Best regards

Amar TR 

Binaries for AD-FMCOMMS4

June 6, 2017, 10:59 pm

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I am working on interface the AD-FMCOMMS4-EBZ to Zedboard Carrier board. Kindly direct me to the relevant Drivers/Binaries so that i can use the device for Evaluation.

Complete Scheme of RF PA Supply using Envelope Tracking Devices

June 7, 2017, 5:21 am

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I am designing an Envelope Tracking System and came across some devices (e.g. HMC1120 and other alternatives) which are capable of doing so.

Request some pointers for complete schemes/solutions/reference designs using ADI's power management devices which can be used for Dynamic Power Supply for Power Amplifier.

AD8000: Biasing the non-inverting input

June 6, 2017, 1:54 pm

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Hi,

 

I'm using AD8000 as a single-supply AC coupled non-inverting amplifier; the circuit configuration is shown in the attached image.

Input signal is a 300kHz pulse with an amplitude of 200-250mV. The gain of the amplifier is ~5.75. The accuracy of the output signal is not all that critical. 

I am biasing the non-inverting input at 1.6V using a ultra low noise voltage regulator. 

Here is my question: since AD8000 is a current feedback amplifier and hence the input bias currents are unmatched/not equal, what value of bias resistor, R2 in the attached image, should I use? Do you have any recommendations? Should I also be adding an additional series resistor on the non-inverting pin?

 

Additional info:

A value of R2=4.99k in the simulation results in the output of the amp being offset by exactly 1.6V. Increasing R2 results in offset lower than 1.6V, while lower values of R2 result in an offset higher than 1.6V.

I've used values of 10k and 357 Ohm for R2 (= Rbias) in the physical circuit with satisfactory results.

 

Thanks,

Aki

 

 

Help to change the sampling rate with AD9371

May 17, 2017, 3:13 am

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Hi,

 

I am using the AD9371 with IIO oscilloscope for Linux and I am struggling with the sampling rate. I want to set the TX sampling rate to 55.18 MHz but I don't know how to do it. I guess I have to change filters' coefficients and IQ rate in the TX Settings tab of  the AD9371 Advanced Plugin and then press the Save Settings button, but I can't find the right combination to have 55.18 MHz at the end. Do I have to change some things in the CLK Settings tab too? In the AD9361 it was done automatically just by changing the sampling rate and then the coefficients were calculated automatically to fit the desired sampling rate, so I am quite lost with the AD9371.

Can someone help me please?

 

PS: I attached some screenshots of the TX Settings and CLK Settings tab if you don't know what I'm talking about.

 

Thanks for your answers.

Yaël

AD9371 board - AD9528_initialize() failed

May 19, 2017, 6:24 am

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At initialization I am getting the following on the UART:

   Please wait...

   AD9528_initialize() failed

 

I have not modified the code at all, left it in DMA mode. Any immediate recommendations for debugging why its not initializing? Was there anything else that needed to be modified in the code to initialize?

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ADV7511K HDMI no video output

June 5, 2017, 5:24 am

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Dear ADI engeer：

    I use  ADV7511 to change YUV Video signal to HDMI LCD display，.but it has no video output。

I have several questions about ADV7511：

   1. Input video is 1280X1080@ot0fps，without DE。Using I2C to detect 0x42, value is 0xF0，0x9E[4] is 0x1.That means PLL is locked.Bebore I set 0x41 to 0x1,TMDS pins only high level. After setting, wave can be detected，but still no video output。0x3E always is 0.Does it suport 1280X1080@30fps?

2.How to set DE with 0x17[0] and 0x35-0x3A?。 

3.Rx need to pull up TMDS after plug HDMI？50 ohm？

 

Please help.Thank you.

ADV7611 stopping SSC..

May 8, 2017, 5:23 am

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One of my customer experiencing that ADV7611 seems to stop SSC. They would like to send through a 65MHz signal with +/- 0.4% SSC. They have measured the signal at RXA_C and comparing it to the LLC. Maybe some of the internal PLL's that can be bypassed or modified to be able to send through SSC....?

 

BR Patrik

 

 

ADV7619/ADV7511 HDCP Repeater

June 6, 2017, 9:49 am

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We're using an ADV7619 with HDCP support to decrypt HDCP video.

 

We're trying to configure the adv7619 as a repeater for HDCP.

 

To accomplish this it's my understanding that we need to do the following:

 

Set BCAPS[6] on initialization.

Determine we want HDCP from upstream AKSV writes (read from IO Map Addr 0x98)

Do downstream authentication and pull in BKSV values, Bstatus, and Bcaps.

Write BKSV values into repeater map 0x80-0xFF changing pages if there are a lot of downstream BKSVs.

Set Bstatus based on downstream devices count and depth and propagate any errors.

Set KSV_LIST_READY at repeater map 0x71[7].

 

After doing this I get HDCP Key fail from a Quantum data 780D HDMI protocol analyzer, and a Blu Ray player I'm using to test sends black video DVI mode ( HDMI map 0x05[7]). The blu ray video also flickers white constantly if that helps. It also seems to consistently write AKSV values. I'm not sure if that's expected.

 

Is there anything else major that should happen?

 

Do we need to Add the KSV of the downstream transmitter? In our case, we're using a 7511. How do we pull its KSV? I'm pulling from the 7511's 0xB0-0xB4 addresses after setting 0xBA[1], but the ksv value doesn't have the expected 20 1's and 0's like the downstream KSV's I'm reading.

 

The ADV7619 Reference Manual mentions the external controller should clear KSV_LIST_READY after the SHA-1 has been computed.

Do we need to clear KSV_LIST_READY immediately after BCAPS[5] is set by the 7619? Or can we simply clear it on re-authentication, errors, and bstatus/bcaps changes? 

 

Are there any timing restrictions between servicing the interrupts and setting the ready's?

AD9629 in single ended mode. input minus vref.

June 7, 2017, 6:19 am

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Hello,

I ve got a question regarding the high speed AD9629 for a new design, in single ended mode. I need to know if my solution is correct. In single ended mode such as figure 39 of the datasheet. Can I use VREF to substract my input and shift down my signal from 0 to 2V to -1V to 1V using an AD8512 to offset the signal and get the full span of the ADC?

 

Please find my schematic example attached.

 

let me know if you need any information

1452 FFT Capability

June 7, 2017, 6:50 am

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Basic Question: Does the 1452 series of DSPs have any useful FFT capability?

 

As far as I can tell from these forums and in the software, the only thing you can do is add signals together. And unless I am mistaken, adding in the time domain is the same as adding in the frequency domain. So I don't see an benefit to using the current FFT capability of the 145X DSPs at all currently. The software suite looks like it has the potential, just no current use for FFT.

 

Thank you!