I bought AD7768-4 Evaluation Board EVAL-AD7768-4FMCZ and Controller Board EVAL-SDP-CH1Z .Then I installed the evaluation software and sample 131072 points once.but I want to sample more points continuously.Then I found the no-OS driver of AD7768.I think it's helpful to my research.but I don't know how to use no -OS driver of AD7768. Could you give me some advice ?
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How do I use no-OS driver of AD7768?
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AD7147 for Finger Capacitance Measurement
Hello
I will examine the change in the value of capacity measured from people's fingers by age for the finishing project. Is the AD7147 development card and software suitable for this project?
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How to offset the temperature range on a AD7793
I am using an AD7793 to measure a thermocouple. I am using Vbias and a gain of 64. This gives me an approximate range for a T-type thermopcouple of +/-357°C. I would like to extend the positive range to 450°C without changing the gain of the ADC, I only need to measure down to -150°C. What would be the best way to adjust the range?
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Configuring AD7124-4 to read the internal temperature sensor
Hi,
I'm trying to configure the ad7124-4 to read its internal temperature sensor.
This my code flow:
Reset_device();
SPI_write 0xB211 to 0x0E // Channel 5, AINP to temperature sensor, AINM to AVSS
SPI_write 0x0810 to 0x1C // Config 3
SPI_write 0x0182 to 0x01 // ADC_CONTROL
while ( SPI_read(0x00) & (1<<7)); // wait till RDY bit goes low
data_32 = SPI_read from address 0x02 // Data register
float temperature = ((data_32 - 0x800000)/13,584) - 272.5;
But I end up getting 311.5 as my temperature and it never changes. It's always constant. Also when I read 0x00 status register, it is 0x00 all the time. I don't get why it doesn't even show channel 5 as active.
Note: 1. I have verified that all my SPI writes have gone through by reading back the registers again.
2. I observed the DRDY pin when CS was pulled low, CLK , VS, GND : connected, MISO, MOSI: unconnected and it was pulsing as expected.
3. The AD7124-4 is connected to my STM32 discover board which is powered by my USB.
4. All the other registers not mentioned above have their default values.
5. The reset_device() has also been verified by reading back the values of the registers and they match the reset values specified in the datasheet.
Any help is greatly appreciated.
Thanks
Edit: JellenieR Would you by any chance know what's wrong? Thanks.
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the noise of AD7492
from the figure of the bellow,we use the samping frequency 100khz to samp the signals,when the time is 40ms,the vibration sigals is coming ,but the analog sinals is no noise(by observating the oscilloscope),and the frequency of analog sinals is about 10khz,but after the conversion of ad7492,we find there are some glitches,when the excitation is starting from the time 40ms.
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AD7266
Hi,
Is there any VHDL/Verilog simulation model for the
AD7266 , Urgent!
AD7490 , Urgent!
ADS7952, Nice-to-have
Thanks
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AD7266 VHDL/Verilog simulation model
Hi,
Is there any VHDL/Verilog simulation model for the
AD7266 , Urgent!
AD7490 , Urgent!
ADS7952, Nice-to-have
Thanks
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ADAS3022 Register Address Map
Hello there,
I'm currently developing a data acquisition solution using the ADAS3022 product. I can't seem to find the device's register address map in the datasheet or the device's main webpage.
The provided evaluation board support package provides a "adas3022.h" file which contains what look like register addresses, but it still very ambiguous as they are not commented.
Can you please provide the materials on the devices internal register addresses?
Many thanks
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Connecting a 4-20mA signal to AD7730 input
Hi everyone,
I have a designed equipment with an load cell input (AD7730) and for another application, I need to connect a 4-20mA signal from an pressure sensor. The power supply of presuure sensor is external, and I tied the 4-20mA to in+ and in- signals of AD7730 throught 1 ohm resistor for converting the 4-20mA to 4-20mV, but the readings are not stable. It´s this connection suitable for doing this? It exist an equivalent chip of AD7730 with an input range higher?
Regards.
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the work mode of ad7492
according to the schematic of AD7492,The pin 11 of the chip is PS/FS,when the pin is high,the chip is in partial sleep mode,and when the pin is low,the chip is in full sleep mode,however,when the pin is impending,the chip is in normal mode?
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Processor Type Doesn't Appear When Creating a New Project
Hello,
I'm trying to create a new project for the ADuCM4050. When I get to the Processor Type screen, only the ADuCM3029 comes up as an option. I have installed all of the ADuCM4050 packs from the CMSIS Pack Manager. How do I get the 4050 to appear in the Processor Type window?
Thanks,
Jordyn
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AD9361 No-OS driver under Linux userspace
Someone asked me by email:
Hello,
My apologies if the answer to this is readily available on the web, but I couldn't manage to find anything.
Would you be able to point me at a device tree entry that i could use for using the no-os ad9361 driver code under linux? I'm specifically looking for the device tree entry that will create the "/dev/spidev32766.0" device. I have put something together myself based on tidbits i gathered around the web, but i'm getting a "failed to transfer one message from queue" error with 'my' spidev device. The no-os driver works fine on my zedboard+fmcomms2 setup when running bare metal, so it appears that i have something messed up in my linux-based spi driver or its configuration.
For bonus points, is there a uio device tree entry to support the uio device the no-os linux driver is attempting to open for the adc and dac dma's?
Regards,
Joe
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Weird behaviour of AD587 Reference
(Voltage references belong to which blog???)
I am testing the 10V-Reference AD587.
1.) In an temperature stabilized housing (40°C) enclosed is...
...Reference AD587 + 220µFpolym. on 15V_Vin + 2µF noise reduction + 3mA output Load (NO Trim, NO Boost)
=> output voltage is 10.00210V - measured with Keithley 2000. (+2,1mV above exact value - OK!)
=> most of the time the voltage fluctuates less than +/-20µV possibly for 30 minutes.
Totally weird:
=> then, without any reason, suddenly starts a downslope in 3 - 5 minutes to 9,994V (down 8mV !!!) with fast wabbly values.
=> After that starts a even faster increase (1 minute) to regain 10.00180V.
=> Once this voltage level is reached, the fluctuations are smaller again (< 100µV).
2.)
I have added a trim potentiometer with 2 Resistors (Tk 50) in series to narrow the range of adjustment.
And I have put the reference in an temperature stabilized housing.
After waiting for the case temperature of AD587 to stabilize, I adjust ref. voltage to 10,0000V (measured with Keithley 2000)
Now the weired behaviour:
- short term: Output voltage fluctuates +/-30µV (is that OK?)
- suddenly the output begins to jitter and output voltage decreases by (sometimes over) 1mV for some time.
Then suddenly the output voltage jumps to 10,0V+20µV and then the fluctuations are small again.
What is this strange behavoir about???
It seems to be that internal auto-correction circuitry becomes unstable from time to time?
It seems that using trim increases the frequency of occurrence drastically.
Even without that erratic behaviour, the medium time stability (minutes to one hour) is only 300µV peak-peak = 30ppm!
That is in strong contrast to data sheet stating "AD587 output noise is typically 4 μV p-p"
I am deeply disappointed by such a "precision".
Is there a remedy to that issue????
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AD7934 Intermittent BUSY signal
Hi there,
I'm having some issues reading from the AD7934. I will firstly describe my configuration, and then state the issue.
I have the ADC on a custom PCB, talking to an FPGA board over some trailing wires, not great for noise, but it mostly seems okay.
My ADC is configured W/B mode set to Word.
Post control register configuration, I set CS and RD low permanently so the output data bits are always driven with the latest data.
I have CLKIN free running. My CONVST falls on the first rising edge to kick off the conversion, the busy signal is detected to rise on the first (next) falling edge.
This is where I start to have a series of intermittent and linked issues. The busy signal should fall on the 14th falling edge of CLKIN. It normally does and a new reading is detected, however sometimes one of two things happen. Firstly the busy signal will fall on the 13th rising edge, not the 14th falling edge. Secondly, the busy signal will fall on the 13th rising edge and then rise again on the 14th falling edge. It will stay risen until the CONVST signal goes high again to end the conversion. I'm not sure what would happen if I delay the rising edge of the CONVST signal. When the busy signal is in the incorrect place, no new conversion is observed on the data bits.
I am not sure if this is due to some timing issue, if I'm not complying with figure 34 in the datasheet somehow. Could it be a noise or manufacturing issue on the PCB as it is intermittent?
Linked are some screenshots from my oscilloscope, The green trace is CONVST, yellow is BUSY, and red is CLKIN
A normal conversion, with busy signal rising on 14th falling edge of CLKIN. A new reading is achieved.
The busy signal falls on the 13th rising edge of CLKIN, and then rises again on the next falling edge. No new reading is achieved.
The busy signal falls on the 13th rising edge, but does not rise again. No new reading is achieved.
Any ideas?
By the way, I only have access to a terrible analogue scope for the next week, so if you want any new traces, they won't be so pretty.
EDIT. I appreciate that in the example in the pictures, the CLKIN signal is <700kHz, which is too low according to the datasheet, but this still happens if I put the frequency up.
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AD8331 Stability Issue
Hello,
I designed a piezo amplifier with the AD8331 as LNA and PGA. The piezo element is very close to the amplifier, so instead of impedance matching I try to keep the input impedance as high as possible to avoid voltage drop. (Piezo Impedance is approx 40 Ohms in resonance). Therefore I do not use the active termination network and leave it open.
The input is DC decoupled with a 100nF capacitor. Since the piezo is practically a capacitor, the input is an open circuit. (true only without signal of course)
I experience the LNA gets unstable when the input is open, independent if the piezo is connected or not. Applying active termination does not help. Also the suggested ferrit bead on the input does not make it better. The only solution is to insert a resistor in the kOhms range or lower from the input to ground. This makes the LNA stable, but the resistor adds noise of course. But making the resistor smaller will make my signal smaller also.
Is there any non-resistor solution to this problem?
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Where is """System Run-Time Documentation"""?
What is "System Run-Time Documentation" referenced in C/C++ Compiler and Library Manual for
Blackfin Processors v2.1?
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ADXL362 Expected Sensitivity Range
In production we do a calibration of the ADXL362 by taking static +/- 1G and 0G readings for each axis. We then do a calibration check to make sure they are within the expected range for the ADXL362. The data sheet specifies the nominal sensitivity to be 250 LSB/g for +/-8g range, with a sensitivity calibration range of +/-10%. We have our limits for each axis set to 220-280 LSB/g, which is +/-12% of the nominal 250LSB/g. We are getting some units that have sensitives as low as 215 LSB/g. I want to verify that this is expected, and why we might see this behavior.
To get the sensitivity for each axis we take the +1G reading minus the -1G reading and divide by 2.
Thank You
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where i can find hdl refrence design for AD9171-fmc-EBZ
where i can find a hdl reference design for AD9171-fmc-EBZ or equivalent that can work with it
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What is the correct power-up sequence for ADSP-2191?
The ADSP-2191 datasheet has the following statement on page 11 concerning the power-up sequence:
"Power up together the two supplies VDDEXT and VDDINT. If they cannot be powered up together, power up the internal (core)supply first (powering up the core supply first reduces the risk of latchup events."
In the design I'm writing about, both supplies are produced using low-dropout linear regulators with a common +5V input. The intent was to power both supplies simultaneously.
The plot below shows the actual timing of VDDEXT (+3.3V) and VDDINT (+2.5V).
The +3.3V supply appears to follow the curve of +2.5V (at a lower voltage) until it turns on a couple of milliseconds later. This timing (I think) is in agreement with the sequence specified in the datasheet. However, I've found that sometimes the DSP locks up on power up, where nothing, other than a power cycle, can recover it.
Delaying the VDDEXT relative to VDDINT doesn't help; but powering VDDEXT before VDDINT does! Could the datasheet have the sequence backwards? I've searched the errata and didn't find anything related to this.
Thanks in advance.
Leo
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DCR Sensing
Hi,
I would like to know is there any difference on the placement of the Inductor DCR sensing.
On the datasheet of LTC3784 the DCR sensing the capacitor and resistor is parallel, whereas on the application note 136 using LTC3855 the application note show a different placement of the DCR sensing.
And also I notice on the buck regulator EMC using LTC3891 is the same configuration as the AN136.
Any feedback or comments will be much appreciated.
Thanks in advance.
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